EPIC/IA64 support for GCC
Last change: 2000-01-06
The E2k and Merced will ship sometime in 2000 or 2001. With them comes a new technology,
not CISC nor RISC nor even VLIW - but EPIC!
While individual key concepts (predication, speculative loads and explicit
parallelisation) are no new inventions, EPIC is the first architecture
making use of all of them in a unique way.
The first EPIC chip that was announced, the Merced,
will be based on the IA64 instruction set architecture,
jointly developed by HP and
Intel. Recently another EPIC chip, the E2k
from Elbrus, was announced that might
get delivered much earlier than the Merced, much pricier and just as
fast. Production might start as early as Q4 2000.
Since it's a new technology, GCC, my favourite compiler, does not yet support
it. This has to be changed.....
What you will find here
At the moment, you will find links to articles having more
information on EPIC (including IA64 and Merced), as well as
references to research literature.
If you want to join the development effort (or have additional information),
just contact the EPIC mailinglist <firstname.lastname@example.org>. If you want to get subscribed to it, ask
Marc Lehmann <email@example.com> (the list is currently managed manually).
- The IA-64 pages on Hewlett Packard's website:
- The IA-64 Developers Home on Intel's website:
- The IA-64 Application Developers Guide is available for download from both
HP and Intel,
the Intel download page is located here.
- The Trillian Project aims at a complete linux port to the IA64 architecture.
At the moment, their site is quite empty, as most of the development happens behind closed doors....
- HPL-1999-83 Porting Linux to IA-64 - Eranian, Stephane; Mosberger, David.
- HPL-1999-100 The Making of Linux / ia64 - Eranian, Stephane; Mosberger, David.
- Is the Intel technology really coming from Russia? The Register published this Article:
Intel uses Russia military technologies
- E2k-related links:
- HP's website on IA64
isn't too generous with information, but it's not too much marketing hype,
and it explains the key concepts of IA64, so it's a good place to start.
- The Byte Magazine featured an article about IA64 on December 1997,
which is available online
- Microprocessor Report has a page dedicated to Merced IA64, they have
their information from peeking at patents.
- Alexei Pylkin had a critical look on the "new" Merced features.
- EETimes has some good articles on Merced, however, most of them are
dated 1997 (guess from the addresses below).
- The HP technical report
about the PlayDoh architecture, but concepts like predication and
speculation sound very familiar and inspiring... (it's available as
- If you want to research some patents yourself, you should visit
IBM's patents server
- "The IA-64 Architecture at Work" is an article from IEEE Computer which shows some actual IA-64 optimization examples.
(Requires IEEE Computer membership)
- This eetimes article discusses the (preliminary?) version of the Merced floor plan.
- An image of what might be the die of Merced can be found at sandpile.
- ULIW (Ultra Long Instruction/Data Word) is a related (and experimental) architecture described
in this document:
features a EPIC research tool including an EPIC C-compiler, a cycle-level
machine simulator and numerous research tools directed towards
optimization research. It's free for research purposes.
- SUIF is a compiler project
targetting parallelization, oop-language, scalar and
mahcine-level optimizations. The source is free for research
and commercial use.
Our data directory
Papers/Books not publicly available online
Here are some research papers and books on predication and VLIW. Do not bother to
look for them online, unless you have ACM or IEEE online access to
If you find any of these documents online, please send me the link!
%A Wenn-Mei Hwu
%T Introduction to Predicated Execution
%J IEEE Computer
%D January 1998
%X Short explanation of predicated execution and if-conversion
%A Wen-Mei Hwu
%A Richard E. Hank
%A David M. Gallagher
%A Scott A. Mahlke
%A Daniel M. Lavery
%A Grant E. Haab
%A John C. Gyllenhaal
%A David I. August
%T Compiler Technology for Future Microprocessors
%J Proceedings of the IEEE
%D December 1995
%X Detailed explanation of predication and if-conversion. Results on spec cint92 and spec cfp92
%A Kemal Ebcioglu
%A Randy D. Groves
%A Ki-Chang Kim
%A Gabriel M. Silberman
%A Isac Ziv
%T VLIW Compilation Techniques in a Superscalar Environment
%J ACM SIGPLAN 94-6
%C Orlando, Florida, USA
%K global scheduling, software pipelining, VLIW superscalars
%X Description of speculative load/store motion out of loops, unspeculation, scheduling, limited combining and basic block expansion.
%A Monica Lam
%T Software Pipelining: an Effective Scheduling Technique for VLIW Machines
%J ACM SIGPLAN 88
%C Atlanta, Georgia
%D June 22-24 1988
%X Comparison with trace scheduling. Results on the WARP machine for Livermore Loops.
%A Utpal Banerjee
%A Rudolf Eigenmann
%A Alexandru Nicolau
%A David A. Padua
%T Automatic Program Parallelization
%J Proceedings of the IEEE
%D February 1993
%X Describes (among other methods): trace scheduling and percolation scheduling.
%A B. R. Rau et al.
%T The Cydra 5 Departmental Supercomputer
%J IEEE Computer
%D January 1989
%X Cydra is one of the first VLIW machines.
%T The Multiflow Trace Scheduling
%J Journal of Supercomputing
%D May 1993
%X Multiflow is one of the first VLIW machines.
%A J. A. Fisher
%T Very Long Instruction Word Architectures and the ELI-512
%J Proceedins of the 10th Symposium on Computer Architectures
%E ACM Press
%X Fisher done pioneer work on VLIW's.
For additional questions/comments/critics do not hesitate to drop me a line!
Marc Lehmann <firstname.lastname@example.org>